instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

• (computer science) the process of carrying out an instruction by a computer
  Synonym:execution

双语例句

• The model of instruction level parallel program execution
  指令级并行程序执行模型
• Bochs was developed purely in the C++ language for interpreted x86 instruction execution and platform emulation.
  对于解译的x86指令执行和平台仿真，Bochs完全是用C++语言开发的。
• Compile the assembler into machine code so that generate PLE file in order to implement the execution mechanism of PLC virtual machine. In this way, the instruction execution speed of PLC is greatly increased and we can save much memory.
  用汇编编译器编译转变成功的汇编程序产生机器码，从而构造出可执行文件&PLE文件，实现PLC虚拟机的机器码执行机制，这样大大提高了PLC指令的执行速度，同时大大节约了内存空间。
• In the instruction execution pipeline stage, scalable pipeline technology was adopted to realize the video processing instruction.
  为有效实现扩展指令，处理器执行级采用了可扩展流水级技术。
• Propose the run time dispatched instruction decoder and issue logic based on instruction execution cycle.
  提出基于指令类型动态分配的译码器设计方案和基于指令执行周期的动态逻辑发射方案。
• A4-stage instruction pipeline for instruction execution makes at-speed test possible.
  四级指令流水线的引入使全速测试成为可能。
• The platform introduces two memory system structure, addressing mode simulation guarantees that not only the operand is correctly obtained, but also the instruction execution time is correctly calculated.
  采用了两种存储器体系结构，寻址方式的模拟不仅保证了正确地确定操作数，而且能够正确统计指令执行时间。
• As the core of SOC, CPU ′ s performance is mostly determined by instruction ′ s execution efficiency. Pipeline increases the instruction ′ s execution pace and improves the CPU ′ s performance.
  作为SOC的核心，CPU的性能主要取决于指令的执行效率，而采用流水线方式大大增加了指令的执行速度，提高了CPU的性能。
• Activity is a unit of instruction execution, and is the building block of a process.
  活动（activity）是指令执行的一个单元，它是一个流程的基本组成部分。
• In the traditional Cache, the Cache hit ratio is insured only by the address locality of memory reference instruction stream during program execution, it restricts the improvement of Cache hit ratio.
  在传统的Cache中，仅仅依靠程序执行时访存指令流地址的局域性来保证较高的Cache命中率，使得Cache命中率的提高受到限制。